Printed Circuit Board Failures – Causes and Cures

The printed circuit board is the fundamental substrate of virtually every electronic board assembly. The physical limitations of printed circuit materials and the complexity of the bare board manufacturing process often go unappreciated by the assembly engineer, who generally expects PCBs to conform to their purchase specification, to be totally compatible with his assembly process and to be totally reliable in service.

But PCBs can fail for a multitude of reasons. And the ability to detect and identify failures during assembly and final test is preferable to having to accept the consequences of field returns.

For over 30 years, a leading authority on electronics assembly technology, Bob Willis shared his encyclopaedic knowledge and practical experience of printed circuit defects with a responsive and interactive audience in a SMART Group webinar titled "Printed Circuit Board Failures – Causes and Cures", clarifying much of the mystery and mythology, describing failure mechanisms, demonstrating the use of standard test methods and tricks of the trade and explaining how to eliminate many of the common causes.

Willis began by recommending works of reference, particularly Clyde Coombs’ Printed Circuit Handbook, Preben Lund’s Quality Assurance of Printed Boards, IPC A-600H Acceptability of Printed Boards‎ and IPC-TM-650 Test Methods Manual; and some relevant specifications: IPC-2221 Generic Standard on Printed Board Design, IPC-6011 Generic Performance Specification for Printed Boards, IPC-4552 Specification for Electroless Nickel/Immersion Gold (ENIG)Plating for Printed Circuit Boards, with the wise precautionary advice: "Never quote a standard unless you know what it says!"

He emphasised the importance of choosing a suitable PCB supplier, and gave clear instructions on how to assess the supplier’s documentation and technical capability, how to conduct a proper supplier audit, procure and evaluate samples and prepare a Supplier Audit report.

Delivery packaging was a significant factor in protecting PCBs from mechanical and environmental damage in transit and storage. Vacuum sealing or moisture-barrier bagging are currently popular.

Once PCBs had been received at goods inwards, Willis described the successive stages of mechanical inspection and dimensional inspection, and demonstrated how simple optical aids could be used to view the insides of plated holes. Solder mask coverage, thickness and adhesion needed to be to an agreed specification, as was freedom from undercutting which could lead to flux or paste entrapment. Willis preferred to see batch and date code information etched into the board surface, either in the solder mask or in the copper.

With reference to IPC's "Nightmare Microsection" multi-issue wall-poster, and to many of his own microsections and x-ray photographs, Willis illustrated and described a whole series of interconnection defects in plated-through holes and blind and buried vias, resulting from problems in the PCB manufacturing process – drilling, de-smearing, metallisation and electroplating – which may have passed electrical test at the bare-board stage, but which could go open-circuit – either permanent or worst-case intermittent – as a result of the thermal shock of soldering. He had developed his own innovative techniques for examining the integrity of laser vias and isolating sources of outgassing. He went on to describe methods for thermal shock testing and subsequently examining microsections for evidence of copper cracking, inner-layer separation from through-hole plating, and de-lamination.

Figure 1 Image60.jpg

Blind via capture pad with no sign of brittle fracture during mechanical testing. The plating of the via to the inner pad was never satisfactory.

Figure 2 3a.jpg

Surface of blind capture pad correctly prepared for plating.

Figure 3 0385.jpg

Outgassing from via hole during testing with oil.

His surveys on behalf of IPC and NPL had indicated that shorts and open circuits accounted for 27% of PCB problems, and via hole failures for 8%. But solderability was by far the principal cause of failure at 39%. He listed a whole series of bare-board solderable finishes: hot-air solder level, immersion silver, immersion tin, organic solderability protective and electroless nickel immersion gold, and reviewed methods for thickness measurement and solderability determination, as well as showing examples of phenomena such as nickel-footing and solder wicking. Whereas the wetting balance gave the most scientific measurement of solderability, it tended to be found mainly in specialist test laboratories. Willis advocated a simple dot-coalescence test as a practical alternative, for which a small test-coupon could straightforwardly be incorporated into the PCB panel design. In the investigation of “black pad” failures, he demonstrated what could be revealed by scanning electron microscopy of electroless nickel surfaces after chemical removal of the gold layer from an ENIG finish.

Short circuits or low-resistance current leakage paths could be formed in service by electrochemical migration of copper, and Willis showed examples of dendritic growth across the PCB surface and conductive anodic filament (CAF) growth from the barrels of plated-through holes along glass-fibre bundles. It was critical that assemblies were free from ionic contamination after the soldering and post-soldering cleaning processes, particularly if the work was to be conformally coated, and Willis described techniques for measuring ionic contamination and interpreting the results.

Two particular defects had been associated with the introduction of lead-free soldering: copper dissolution and pad cratering. In the former case, if there was no electroless nickel barrier layer, there was a tendency for copper to be dissolved by the solder, particularly if the solder had a high silver content, in some cases drastically reducing the effective thickness of surface-mount pads, and in the latter case for a cohesive failure to occur in the resin under the pad as a result of the increased brittleness of laminates formulated to withstand lead-free processing temperatures.

Posted From:

Author: Pete Starkey

11 Flora Spgs,
Irvine, CA 92602
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